Printed circuit board testing has traditionally been performed using bed-of-nails in-circuit test equipment. This equipment typically includes a test fixture having a multitude of test probes (known as a “bed of nails”) that, when coupled to a circuit board, simultaneously contacts numerous electrical nodes on the circuit board, thereby providing electrical access to the components on the board. Various electrical tests may then be performed on the circuit components, usually under computer control. For various reasons, it is becoming increasingly difficult to perform in-circuit testing using a “bed-of-nails” approach. For example, integrated circuits (ICs) are getting smaller and IC packages are using finer and finer lead pitches making it difficult to contact all of the desired nodes in the circuit with a bed-of-nails. Also, many ICs are using packages that have an array of leads on a single side thereof (e.g., ball grid arrays, pin grid arrays, etc.) that are inaccessible to a bed-of-nails once the IC has been attached to the circuit board.
To overcome many of the problems associated with traditional in-circuit testing, boundary scan testing has been developed. Boundary scan is a technique that incorporates additional hardware into electrical devices that allows the pins of the devices to be accessed and tests to be performed without the use of a bed-of-nails type fixture. Boundary scan techniques can allow controllability and observability of the boundary pins of one or more compatible devices in a circuit or system via software control. Although boundary scan techniques have proven successful and are very popular, they are not currently capable of reliably identifying bridging faults in circuits. Therefore, there is a need for techniques and structures that are capable of increasing the reliability with which bridging faults are detected in circuits and/or systems having boundary scan compatible devices.